Comparative Performance Analysis of XOR-XNOR Function Based High-Speed CMOS Full Adder Circuits

This CMOS Design, Complimentary Pass Transistor Logic Design and papers presents the realization of full adder designs using Complimentary XOR-XNOR Design in a single unit. The main motive of this paper is to determine the comparative study of power, delay, power delay product(PDP) of different Full adder designs using CMOS Logic Styles. Simulations results clearly determines that XOR-XNOR type Full adder Design is better compared to Complimentary CMOS style and Pass Transistor Design with respect to power, delay. Power Delay Product Comparison. The power delay product is also important parameter to determines the performance of the design. The XOR-XNOR implementation provides better performance and requires less number of transistors compared to other full adder designs. The implementation of design using GPDK 180nm with supply voltage of 1.8 V in Cadence Virtuoso Schematic Composer and simulations done by using Spectre Environment.