Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters

被引:268
作者
Kavousi, Ayoub [1 ]
Vahidi, Behrooz [1 ]
Salehi, Reza [1 ]
Bakhshizadeh, Mohammad Kazem [1 ]
Farokhnia, Naeem [1 ]
Fathi, S. Hamid [1 ]
机构
[1] Amirkabir Univ Technol, Dept Elect Engn, Tehran 441315875, Iran
关键词
Bee algorithm (BA); genetic algorithm (GA); multilevel inverter; selective harmonic elimination PWM (SHEPWM); FORMULATION;
D O I
10.1109/TPEL.2011.2166124
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the Bee optimization method for harmonic elimination in a cascaded multilevel inverter. The main objective in selective harmonic elimination pulsewidth modulation strategy is eliminating low-order harmonics by solving nonlinear equations, while the fundamental component is satisfied. In this paper, the Bee algorithm (BA) is applied to a 7-level inverter for solving the equations. The algorithm is based on the food foraging behavior of a swarm of a honeybees and it performs a neighborhood search combined with a random search. This method has higher precision and probability of convergence than the genetic algorithm (GA). MATLAB software is used for optimization and comparison of GA and BA. Simulation results show superiority of BA over GA in attaining accurate global minima and higher convergence rate. Also, its performance in 10 times run is the same as in 1 time run. Finally, for verifying purposes, an experimental study is performed.
引用
收藏
页码:1689 / 1696
页数:8
相关论文
共 21 条
[1]   Elimination of harmonics in a multi-level inverter with unequal DC sources using the Homotopy algorithm [J].
Aghdam, M. G. Hosseini ;
Fathi, S. H. ;
Gharehpetian, G. B. .
2007 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, PROCEEDINGS, VOLS 1-8, 2007, :578-583
[2]   Selective harmonic elimination PWM control for cascaded multilevel voltage source converters: A generalized formula [J].
Dahidah, Mohamed S. A. ;
Agelidis, Vassilios G. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2008, 23 (04) :1620-1630
[3]   Active harmonic elimination for multilevel converters [J].
Du, Z ;
Tolbert, LM ;
Chiasson, JN .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2006, 21 (02) :459-469
[4]   Calculating the Formula of Line-Voltage THD in Multilevel Inverter With Unequal DC Sources [J].
Farokhnia, Naeem ;
Vadizadeh, Hadi ;
Fathi, Seyyed Hamid ;
Anvariasl, Fariba .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2011, 58 (08) :3359-3372
[5]   A Generalized Half-Wave Symmetry SHE-PWM Formulation for Multilevel Voltage Inverters [J].
Fei, Wanmin ;
Du, Xiaoli ;
Wu, Bin .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (09) :3030-3038
[6]   A Generalized Formulation of Quarter-Wave Symmetry SHE-PWM Problems for Multilevel Inverters [J].
Fei, Wanmin ;
Ruan, Xinbo ;
Wu, Bin .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (07) :1758-1766
[7]   VSC-Based HVDC Power Transmission Systems: An Overview [J].
Flourentzou, Nikolas ;
Agelidis, Vassilios G. ;
Demetriades, Georgios D. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (3-4) :592-602
[8]   Harmonic Minimization in Multilevel Inverters Using Modified Species-Based Particle Swarm Optimization [J].
Hagh, Mehrdad Tarafdar ;
Taghizadeh, Hassan ;
Razi, Kaveh .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (10) :2259-2267
[9]   A Medium-Voltage Motor Drive With a Modular Multilevel PWM Inverter [J].
Hagiwara, Makoto ;
Nishimura, Kazutoshi ;
Akagi, Hirofumi .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2010, 25 (07) :1786-1799
[10]   A 6.6-kV Transformerless Motor Drive Using a Five-Level Diode-Clamped PWM Inverter for Energy Savings of Pumps and Blowers [J].
Hatti, Natchpong ;
Hasegawa, Kazunori ;
Akagi, Hirofumi .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (3-4) :796-803