Design and implementation of an efficient integer count sort in CUDA GPUs

We describe experience on design and implementation of an efficient count sort algorithm on Compute Unified Device Architecture graphics processing units. The novelty of this work is twofold. At first, we propose a count sort algorithm for integers that needs no synchronization at its last step and thus, offers superior performance. At second, this work contributes ad hoc techniques for optimizing the performance of the algorithm on Compute Unified Device Architecture-enabled graphics processing units. Copyright (C) 2011 John Wiley & Sons, Ltd.