Design procedure for two-stage CMOS operational amplifiers employing current buffer

被引：51

作者：

Mahattanakul, J ^{[1
]}

机构：

[1] Mahanakorn Univ Technol, Dept Elect Engn, Bangkok 10530, Thailand

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2005年 / 52卷 / 11期

关键词：

CMOS analog integreated circuit; frequency compensation; operational amplifier; poles and zeros;

D O I：

10.1109/TCSII.2005.852530

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The design procedure of the two-stage CMOS operational amplifiers employing Miller capacitor in conjunction with the common-gate current buffer is presented. Unlike the previously reported design strategy of the opamp of this type, which results in the opamp with a pair of nondominant complex conjugate poles and a finite zero, the proposed procedure is based upon the design strategy that results in the opamp with only one dominant pole. Design example of the proposed procedure is given.

引用

页码：766 / 770

页数：5

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