Multilevel optimization for large-scale circuit placement

被引:70
作者
Chan, TF [1 ]
Cong, J [1 ]
Kong, TM [1 ]
Shinnerl, JR [1 ]
机构
[1] Univ Calif Los Angeles, Dept Math, Los Angeles, CA 90095 USA
来源
ICCAD - 2000 : IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN | 2000年
关键词
D O I
10.1109/ICCAD.2000.896469
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
We have designed and implemented a new class of fast and highly scalable placement algorithms that directly handle complex constraints and achieve total wirelengths comparable to the state of the art. Our approach exploits recent advances in (i) multilevel methods for hierarchical computation, (ii) interior-point methods for nonconvex nonlinear programming, and (iii) the Fast Multipole Method for the order N evaluation of sums over the N(N - 1)/2 pairwise interactions of N components. Significant adaptation of these methods for the placement problem is required, and we have therefore developed a set of customized discrete algorithms for clustering, declustering, slot assignment, and local refinement with which the continuous algorithms are naturally combined. Preliminary test runs on benchmark circuits with up to 184,000 cells produce total wirelengths within approximately 5-10% of those of GORDIAN-L [1] in less than one tenth the run time. Such an ultra-fast placement engine is badly needed for timing convergence of the synthesis and layout phases of integrated circuit design.
引用
收藏
页码:171 / 176
页数:6
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