Dual-Sweep Combinational Transconductance Technique for Separate Extraction of Parasitic Resistances in Amorphous Thin-Film Transistors

We report a dual-sweep combinational transconductance technique for separate extraction of parasitic source (R-S) and drain (R-D) resistances in thin-film transistors (TFTs) by combining forward and reverse transfer characteristics. In the proposed technique, gate bias-dependent total resistance [R-TOT (V-GS)] and degradation of the transconductance due to the parasitic resistance at the source terminal during the dual-sweep characterization are employed. Applying the proposed technique to amorphous oxide semiconductor TFTs with various combinations of channel length (L) and width (W), we successfully separated R-S and R-D. A model for the W- and L-dependences of the extracted parasitic resistances is also provided.