Optimum threshold-voltage tuning for low-power, high-performance microprocessor

被引：5
|
作者：
Miyazaki, M [1 ]
Ono, G [1 ]
Kawahara, T [1 ]
机构：
[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan
来源：
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/ISCAS.2005.1464513
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Several technologies using threshold-voltage (V(TH)) tuning are introduced for performance control of a microprocessor. Body-bias and supply-voltage control enable V(TH) tuning. Design methodology of the tuning system is analytically discussed. Forward body biasing and V(TH) balancing improves CMOS circuit performance. Some tuning systems, such as a static body-bias control, an adaptive body-bias control, a supply-voltage/body-bias dual control, are introduced. The V(TH) tuning enables a microprocessor to operate in the optimum manner.
引用
收藏
页码：17 / 20
页数：4
相关论文
共 50 条
  • [31] A Low-Voltage, Low-Power Subthreshold CMOS Voltage Reference without Resistors and High Threshold Voltage Devices
    Zhang, Jun
    Luo, Yunling
    Wang, Qiaobo
    Li, Jingjing
    Gong, Zhuqian
    Tan, Hong-Zhou
    Long, Yunliang
    2012 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), 2012, : 384 - 387
  • [32] A low-power high-performance digital predistorter for wideband power amplifiers
    Manyam V.N.
    Pham D.-K.G.
    Jabbour C.
    Desgreys P.
    Analog Integrated Circuits and Signal Processing, 2018, 97 (03) : 483 - 492
  • [33] Effect of SiC power DMOSFET threshold-voltage instability
    Lelis, A. J.
    Habersat, D.
    Green, R.
    Ogunniyi, A.
    Gurfinkel, M.
    Suehle, J.
    Goldsman, N.
    SILICON CARBIDE 2008 - MATERIALS, PROCESSING AND DEVICES, 2008, 1069 : 215 - +
  • [34] Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era
    Basu, A
    Lin, SC
    Wason, V
    Mehrotra, A
    Banerjee, K
    41ST DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2004, 2004, : 884 - 887
  • [35] Channel profile optimization and device design for low-power high-performance dynamic-threshold MOSFET
    Wann, C
    Assaderaghi, F
    Dennard, R
    Hu, CM
    Shahidi, G
    Taur, Y
    IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, : 113 - 116
  • [36] A low-power high-performance voltage sense amplifier for static RAM and comparison with existing current/voltage sense amplifiers
    Divya
    Mittal P.
    International Journal of Information Technology, 2022, 14 (4) : 1711 - 1718
  • [37] A high-performance low-power CMOS AGC for GPS application
    雷倩倩
    许奇明
    陈治明
    石寅
    林敏
    贾海珑
    半导体学报, 2010, 31 (02) : 49 - 53
  • [38] Low-power high-performance reconfigurable computing cache architectures
    Sangireddy, R
    Kim, H
    Somani, AK
    IEEE TRANSACTIONS ON COMPUTERS, 2004, 53 (10) : 1274 - 1290
  • [39] Design of Low-Power High-Performance FinFET Standard Cells
    Wang, Tian
    Cui, Xiaoxin
    Liao, Kai
    Liao, Nan
    Yu, Dunshan
    Cui, Xiaole
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2018, 37 (05) : 1789 - 1806
  • [40] Custom Design in a Low-Power/High-Performance ASIC World
    Garibay, Ty
    Reis, Richard
    2009 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2009, : 1 - 2
12345