Demonstration of Fan-out Silicon Photonics Module for Next Generation Co-Packaged Optics (CPO) Application

被引:10
作者
Chou, Bruce [1 ]
Sawyer, Brett M. [1 ,2 ]
Lyu, Gap [1 ]
Timurdugan, Erman [1 ]
Minkenberg, Cyriel [1 ]
Zilkie, Aaron J. [1 ]
McCann, David [1 ]
机构
[1] Rockley Photon Inc, Pasadena, CA 91101 USA
[2] Nubis Commun Inc, New Providence, NJ USA
来源
IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022) | 2022年
关键词
Co-packaged optics; silicon photonics; wafer-level fan-out; elastomer socket;
D O I
10.1109/ECTC51906.2022.00071
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design and demonstration of a co-packaged optical engine using Rockley's co-designed chipsets, where the fan-out Electrical IC (EIC) substrate is flip-chip bonded to the Photonics Integrated Circuit (PIC), then socketed to the switch ASIC board. Combining fan-out, flip-chip, and socketing optimizes signal integrity and material/packaging cost for the PIC and EIC, while maximizing integration density and rework-ability of the optical engines. The proof-of-concept is realized using our 25 Gbps/ch chipset, and the testing results proved that, not only does our packaging method enable fully functional testing, its impact to the bandwidth of the chipset is negligible. Therefore, the optical engine packaging can be applied to next generation chipset without losing signal integrity and power.
引用
收藏
页码:394 / 402
页数:9
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