Reconfigurable nanoelectronics using graphene based spintronic logic gates

被引:3
作者
Dery, Hanan [1 ,2 ]
Wu, Hui [1 ]
Ciftcioglu, Berkehan [1 ]
Huang, Michael [1 ]
Song, Yang [2 ]
Kawakami, Roland [3 ]
Shi, Jing [3 ]
Krivorotov, Ilya [4 ]
Telesca, Donald A. [5 ]
Zutic, Igor [6 ]
Sham, Lu J. [7 ]
机构
[1] Univ Rochester, Dept Elect & Comp Engn, 601 Elmwood Ave, Rochester, NY 14627 USA
[2] Univ Rochester, Dept Phys, Rochester, NY 14627 USA
[3] Univ Calif Riverside, Dept Phys, Riverside, CA 92521 USA
[4] Univ Calif Irvine, Dept Phys, Irvine, CA 92697 USA
[5] AERL RVSEF, Space Elect Branch, Kirtland AFB, NM 87117 USA
[6] SUNY Buffalo, Dept Phys, Buffalo, NY 14260 USA
[7] Univ Calif San Diego, Dept Phys, La Jolla, CA 92093 USA
来源
SPINTRONICS IV | 2011年 / 8100卷
关键词
spintronics; network search engines; content addressable memory; MAGNETIC TUNNEL-JUNCTIONS; SPIN-TRANSFER; ALGORITHM; MODEL;
D O I
10.1117/12.890318
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
This paper presents a novel design concept for spintronic nanoelectronics that emphasizes a seamless integration of spin-based memory and logic circuits. The building blocks are magneto-logic gates(1) based on a hybrid graphene/ferromagnet material system. We use network search engines as a technology demonstration vehicle and present a spin-based circuit design with smaller area, faster speed, and lower energy consumption than the state-of-the-art CMOS counterparts. This design can also be applied in applications such as data compression,(2-5) coding(6) and image recognition.(7,8) In the proposed scheme, over 100 spin-based logic operations are carried out before any need for a spin-charge conversion. Consequently, supporting CMOS electronics requires little power consumption. The spintronic-CMOS integrated system can be implemented on a single 3-D chip. These nonvolatile logic circuits hold potential for a paradigm shift in computing applications.
引用
收藏
页数:11
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