A wide range charge-balancing circuit using floating-gate transistors

被引:0
|
作者
Hu, Jingzhen [1 ]
Gordon, Christal [1 ]
机构
[1] N Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27606 USA
关键词
D O I
暂无
中图分类号
R318 [生物医学工程];
学科分类号
0831 ;
摘要
A CMOS circuit has been designed to produce charge-balanced biphasic current pulses for electrical stimulation of neurons. The circuit uses synaptic current source to generate discharging current pulses for stimulating current with amplitude ranging from 100pA to 110nA and period ranging from 0.2s to 1s. The amplitude and duration of the discharging current is controlled using programmable floating-gate transistors. The circuit has high stimulation efficiency and can be used in various neural microstimulators.
引用
收藏
页码:5696 / 5699
页数:4
相关论文
共 50 条
  • [31] Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs
    Nimmalapudi, Sai Govinda Rao
    Volanis, Georgios
    Lu, Yichuan
    Antonopoulos, Angelos
    Marshall, Andrew
    Makris, Yiorgos
    PROCEEDINGS OF THE 2020 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2020), 2020, : 286 - 289
  • [32] Wide input-range four-quadrant analog multiplier using floating-gate MOSFET's
    Zhu, DS
    Tanno, K
    Ishizuka, O
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2003, E86A (07) : 1759 - 1765
  • [33] Parasitic Charge Movement In Floating-Gate Array Programming
    Gray, Jordan D.
    Hasler, Paul E.
    2008 51ST MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2008, : 874 - 877
  • [34] CHARGE-BALANCING CURRENT INTEGRATOR WITH LARGE DYNAMIC-RANGE
    GOTTSCHALK, B
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH, 1983, 207 (03): : 417 - 421
  • [35] A single-electron stochastic associative processing circuit robust to random background-charge effects and its structure using nanocrystal floating-gate transistors
    Yamanaka, T
    Morie, T
    Nagata, M
    Iwata, A
    NANOTECHNOLOGY, 2000, 11 (03) : 154 - 160
  • [36] A Novel Domino Logic Based on Floating-Gate MOS Transistors
    Sharroush, Sherif M.
    Nafea, Sherif F.
    JORDAN JOURNAL OF ELECTRICAL ENGINEERING, 2023, 9 (03): : 410 - 438
  • [37] Circuit for logical-binary functions using MOS floating-gate devices
    Santiago, AM
    Barranca, MAR
    2005 2nd International Conference on Electrical & Electronics Engineering (ICEEE), 2005, : 211 - 214
  • [38] An Enhanced Dynamic Switch Logic with Floating-Gate MOS Transistors
    Hang, Guoqiang
    Zhang, Danyan
    Zhou, Xuanchang
    You, Xiaohu
    2013 9TH INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND SECURITY (CIS), 2013, : 294 - 297
  • [39] Analogue squarer and multiplier based on floating-gate MOS transistors
    Vlassis, S
    Siskos, S
    ELECTRONICS LETTERS, 1998, 34 (09) : 825 - 826
  • [40] Analogue squarer and multiplier based on floating-gate MOS transistors
    Aristotle Univ of Thessaloniki, Thessaloniki, Greece
    Electron Lett, 9 (825-826):