CMOS implementation of a 1.6 GHz low voltage low phase noise quadrature output frequency synthesizer with automatic amplitude control

被引:4
作者
Casha, Owen [1 ]
Grech, Ivan [1 ]
Micallef, Joseph [1 ,2 ]
Gatt, Edward [1 ]
机构
[1] Univ Malta, Fac Informat & Commun Technol, Dept Micro & Nanoelect, Msida 2080, MSD, Malta
[2] Univ Malta, Fac Engn, Msida 2080, MSD, Malta
关键词
phase noise; quadrature VCO; DC-DC converter; automatic amplitude control; AM-to-PM up-conversion;
D O I
10.1007/s10470-008-9151-3
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This article presents the design of a 1.2 V CMOS low phase noise quadrature output frequency synthesizer (FS) to be used for a GPS tuner application. Special reference is made to the design of a wide tuning range quadrature output voltage-controlled oscillator which is equipped with an automatic amplitude controller. It exhibits a phase noise response of less than -115 dBc/Hz at an offset of 1 MHz from the carrier and has a tuning range of over 36%. The effect of the automatic amplitude control is shown to improve phase noise at high oscillation frequencies and its noise has a negligible effect on the phase noise response even at low offset frequencies from the carrier. Preliminary analysis is presented showing the negligible effect of a DC-DC converter on the spurious level of the FS, included to permit the use of low sensitivity varactors. Design guidelines for reducing both the loop noise and the AM-to-PM conversion factors of the oscillator are also given. The design was made using the STMicroelectronics 0.13 mu m HCMOS9-RF technology design kit.
引用
收藏
页码:3 / 19
页数:17
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