Efficient variable-coefficient RNS-FIR filters with no restriction on the moduli set

被引:1
作者
Belghadr, Armin [1 ]
Jaberipur, Ghassem [1 ,2 ]
机构
[1] Shahid Beheshti Univ, Dept Comp Sci & Engn, Tehran, Iran
[2] Inst Res Fundamental Sci IPM, Sch Comp Sci, POB 19395-5746, Tehran, Iran
关键词
FIR filter; Variable coefficient; Digital signal processing; Residue number system; Modular adder; Multiply accumulate; Large dynamic range; RESIDUE; ARCHITECTURE; MULTIPLIER; DESIGN; 2(N); METHODOLOGY; ADDER;
D O I
10.1007/s11760-021-02097-9
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Introduction of residue number systems (RNS) into hardware realization of high dynamic range FIR filters is known to be advantageous. However, deciding on the number and forms of the moduli, and nature of the filter coefficients is a critical issue, wherein all the previous relevant works lean on RNS multiplication schemes that only work with restricted forms of moduli (e.g., only prime numbers) or only constant FIR coefficients; hence considerably tightening the design space. As a remedy, we propose a modulo-(2(n) - delta) multiplier/accumulator scheme (The parameter n represents the bit-width of the corresponding residue channels wherein the other parameter delta determines the exact value of the corresponding modulo) with no restriction on the value of delta (except that delta < 2(n-1), for balancing the widths of residue channel), nor on the constant/variable nature of the coefficients. The key to this liberty of choice is the especial handling of the end-around carries of modular operations that results in performing only regular non-modular operations, except for the last two that yield the final result. Simulation and synthesis of the proposed circuits show speed, cost and power gains.
引用
收藏
页码:1443 / 1454
页数:12
相关论文
共 43 条
[1]  
Ahmadifar H, 2013, CSI INT SYMP COMPUT, P31, DOI 10.1109/CADS.2013.6714234
[2]   FIR Filter Realization via Deferred End-Around Carry Modular Addition [J].
Belghadr, Armin ;
Jaberipur, Ghassem .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65 (09) :2878-2888
[3]   Low-power adaptive filter based on RNS components [J].
Bernocchi, G. L. ;
Cardarilli, G. C. ;
Del Re, A. ;
Nannarelli, A. ;
Re, M. .
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, :3211-3214
[4]  
Cardarilli G. C., 2017, Embedded Systems Design with Special Arithmetic and Number Systems, P181
[5]  
Cardarilli GC, 2007, CONFERENCE RECORD OF THE FORTY-FIRST ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1-5, P1426
[6]   Design Space Exploration Based Methodology for Residue Number System Digital Filters Implementation [J].
Cardarilli, Gian Carlo ;
Di Nunzio, Luca ;
Fazzolari, Rocco ;
Nannarelli, Alberto ;
Petricca, Massimo ;
Re, Marco .
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2022, 10 (01) :186-198
[7]   ANALYSIS OF QUANTIZATION ERRORS IN DIRECT FORM FOR FINITE IMPULSE RESPONSE DIGITAL FILTERS [J].
CHAN, DSK ;
RABINER, LR .
IEEE TRANSACTIONS ON AUDIO AND ELECTROACOUSTICS, 1973, AU21 (04) :354-366
[8]  
Chueng, 2018, U.S. Patent, Patent No. [9,866,742, 9866742]
[9]   Improved RNS FIR filter architectures [J].
Conway, R ;
Nelson, J .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2004, 51 (01) :26-28
[10]   A tool for automatic generation of RTL-Level VHDL description of RNS FIR filters [J].
Del Re, A ;
Nannarelli, A ;
Re, M .
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, :686-687