Analysis and Design of Continuous-Time Delta-Sigma Converters Incorporating Chopping

被引:78
作者
Billa, Sujith [1 ]
Sukumaran, Amrith [1 ,2 ]
Pavan, Shanthi [1 ]
机构
[1] IIT Madras, Madras 600036, Tamil Nadu, India
[2] Texas Instruments India Ltd, Bengaluru 560093, India
关键词
Active-RC; audio; chopping; delta-sigma; feedforward; integrator; linear periodically time-varying (LPTV); oversampled; time varying; MODULATOR;
D O I
10.1109/JSSC.2017.2717937
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Chopping the operational transconductance amplifier (OTA) of the input integrator in a CT Delta Sigma M is a traditional and effective way of addressing flicker noise in such modulators. Unfortunately, chopping leads to aliasing of shaped quantization noise into the signal band and degrades performance. We analyze the mechanisms of shaped-noise aliasing in OTA-RC integrators that use two-stage feedforward-compensated OTAs, and show that aliasing can be largely mitigated by using an finite impulse response feedback digital-to-analog converter with its zeros placed at multiples of twice the chopping frequency. The theory is borne out by measurement results from a single-bit CT Delta Sigma M, which achieves a peak SNDR of 98.5 dB in a 24-kHz bandwidth while consuming only 280 mu W from a 1.8-V supply. Realized in a 180-nm CMOS technology, it achieves a 1/f noise corner of about 3 Hz when chopped at f(s)/24.
引用
收藏
页码:2350 / 2361
页数:12
相关论文
共 16 条
[1]  
Ahmed I., 2015, IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2015-Augus, pC294, DOI DOI 10.1109/VLSIC.2015.7231296
[2]  
[Anonymous], 2008, IEEE ISSCC DIG TECH
[3]  
Berti C. D., 2016, IEEE J SOLID-ST CIRC, V51, P1607
[4]  
Billa S, 2016, ISSCC DIG TECH PAP I, V59, P276, DOI 10.1109/ISSCC.2016.7418014
[5]  
Dörrer L, 2006, PROC EUR SOLID-STATE, P195
[6]   Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization [J].
Enz, CC ;
Temes, GC .
PROCEEDINGS OF THE IEEE, 1996, 84 (11) :1584-1614
[7]  
Gönen B, 2016, ISSCC DIG TECH PAP I, V59, P282
[8]   A 1 V 103 dB 3rd-Order Audio Continuous-Time Δ Σ ADC With Enhanced Noise Shaping in 65 nm CMOS [J].
Leow, Yoon Hwee ;
Tang, Howard ;
Sun, Zhuo Chao ;
Siek, Liter .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2016, 51 (11) :2625-2638
[9]  
Pavan S., 2017, UNDERSTANDING DELTA
[10]   Analysis of Chopped Integrators, and Its Application to Continuous-Time Delta-Sigma Modulator Design [J].
Pavan, Shanthi .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (08) :1953-1965