IDeF-X V1.1: Performances of a New CMOS 16 Channels Analogue Readout ASIC for Cd(Zn)Te Detectors

被引:16
作者
Lugiez, F. [1 ]
Gevin, O. [1 ]
Baron, P. [1 ]
Delagnes, E. [1 ]
Limousin, O. [2 ]
机构
[1] CEA Saclay, DAPNIA SEDI, F-91191 Gif Sur Yvette, France
[2] CEA Saclay, DAPNIA, SEDI, F-91191 Gif Sur Yvette, France
来源
2006 IEEE NUCLEAR SCIENCE SYMPOSIUM CONFERENCE RECORD, VOL 1-6 | 2006年
关键词
D O I
10.1109/NSSMIC.2006.355981
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new full custom readout ASIC is presented. Its name is IDeF-X V1.1 for Imaging Detector Front-end. The actual version of the IDeF-X ASIC is a complete 16 channels analogue front-end with self triggering capability. The chip has been optimized for high resolution, X ray or gamma ray spectroscopy (4 to 300 keV). Each channel includes a charge sensitive preamplifier with a continuous reset system, a pole zero cancellation system, a fourth order Sallen & Key type shaper with variable peaking time, a stretcher (peak detector plus storage capacitor) and a discriminator with a low level threshold common to all channels. An analogue multiplexer followed by an output buffer is used to read each stretcher output. All the discriminators feed a trigger output to the external data acquisition system. The electronic chain is optimized for detector capacitance from 2 to 5 pF.
引用
收藏
页码:841 / 844
页数:4
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