Artificial neural networks in hardware A survey of two decades of progress

被引:479
作者
Misra, Janardari [1 ]
Saha, Indranil [2 ]
机构
[1] HTS Res, Bangalore 560076, Karnataka, India
[2] Univ Calif Los Angeles, Dept Comp Sci, Los Angeles, CA 90095 USA
关键词
Hardware neural network; Neurochip; Parallel neural architecture; Digital neural design; Analog neural design; Hybrid neural design; Neuromorphic system; FPGA based ANN implementation; CNN implementation; RAM based implementation; Optical neural network; OPTIC-NERVE SIGNALS; ANALOG VLSI; SPIKING NEURONS; DIGITAL HARDWARE; RECONFIGURABLE HARDWARE; CIRCUIT BLOCK; SIMPLE-MODEL; IMPLEMENTATION; CHIP; ARCHITECTURE;
D O I
10.1016/j.neucom.2010.03.021
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This article presents a comprehensive overview of the hardware realizations of artificial neural network (ANN) models known as hardware neural networks (HNN) appearing in academic studies as prototypes as well as in commercial use HNN research has witnessed a steady progress for more than last two decades though commercial adoption of the technology has been relatively slower We study the overall progress in the field across all major ANN models hardware design approaches and applications We outline underlying design approaches for mapping an ANN model onto a compact reliable and energy efficient hardware entailing computation and communication and survey a wide range of illustrative examples Chip design approaches (digital analog hybrid and FPGA based) at neuronal level and as neurochips realizing complete ANN models are studied We specifically discuss in detail neuromorphic designs including spiking neural network hardware cellular neural network implementations reconfigurable FPGA based implementations in particular for stochastic ANN models and optical implementations Parallel digital implementations employing bit-slice systolic and SIMD architectures implementations for associative neural memories and RAM based implementations are also outlined We trace the recent trends and explore potential future research directions (C) 2010 Elsevier BV All rights reserved
引用
收藏
页码:239 / 255
页数:17
相关论文
共 277 条
[81]   A FUNCTIONAL MICROCIRCUIT FOR CAT VISUAL-CORTEX [J].
DOUGLAS, RJ ;
MARTIN, KAC .
JOURNAL OF PHYSIOLOGY-LONDON, 1991, 440 :735-769
[82]  
DOUGLAS RJ, 1994, 1994 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, VOL 1-7, P1848, DOI 10.1109/ICNN.1994.374439
[83]  
Duong T A, 2000, Int J Neural Syst, V10, P199
[84]  
Duong TA, 1995, 1995 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS PROCEEDINGS, VOLS 1-6, P175, DOI 10.1109/ICNN.1995.488088
[85]   Robot vision with cellular neural networks:: A practical implementation of new algorithms [J].
Egidio Pazienza, Giovanni ;
Ponce-Garcia, Xavier ;
Balsi, Marco ;
Vilasis-Cardona, Xavier .
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2007, 35 (04) :449-462
[86]  
Eppler W, 1997, HIGH SPEED NEURAL NE
[87]   Scalable closed-boundary analog neural networks [J].
Fakhraie, SM ;
Farshbaf, H ;
Smith, KC .
IEEE TRANSACTIONS ON NEURAL NETWORKS, 2004, 15 (02) :492-504
[88]   OPTOELECTRONIC ANALOGS OF SELF-PROGRAMMING NEURAL NETS - ARCHITECTURE AND METHODOLOGIES FOR IMPLEMENTING FAST STOCHASTIC LEARNING BY SIMULATED ANNEALING [J].
FARHAT, NH .
APPLIED OPTICS, 1987, 26 (23) :5093-5103
[89]   Realizing Biological Spiking Network Models in a Configurable Wafer-Scale Hardware System [J].
Fieres, Johannes ;
Schemmel, Johannes ;
Meier, Karlheinz .
2008 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-8, 2008, :969-976
[90]   OPTICAL IMPLEMENTATIONS OF ASSOCIATIVE NETWORKS WITH VERSATILE ADAPTIVE LEARNING CAPABILITIES [J].
FISHER, AD ;
LIPPINCOTT, WL ;
LEE, JN .
APPLIED OPTICS, 1987, 26 (23) :5039-5054