Design Considerations of Synaptic Device for Neuromorphic Computing

被引:0
|
作者
Yu, Shimeng [1 ]
Kuzum, Duygu [2 ,3 ]
Wong, H. -S. Philip [2 ]
机构
[1] Arizona State Univ, Sch Comp Informat & Decis Syst Engn, Tempe, AZ 85281 USA
[2] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA
[3] Univ Penn, Dept Bioengn, Philadelphia, PA 19104 USA
来源
2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2014年
基金
美国国家科学基金会;
关键词
synaptice device; neuromorphic computing; learning; plasticity; PCM; RRAM; CBRAM; NANODEVICE; NEURONS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Hardware implementation of neuromorphic computing is attractive as a computing paradigm beyond the conventional digital Boolean computing. Recently, two-terminal emerging memory devices that show electrically-triggered resistance modulation have been proposed as synaptic devices for neuromorphic computing. The synaptic device candidates include phase change memory (PCM), resistive RAM (RRAM) and conductive bridge RAM (CBRAM), etc. In this paper, we discuss the general design considerations of synaptic devices for plasticity and learning. As a rule of thumb for performance metrics assessment, an ideal synaptic device should have characteristics such as dimension, energy consumption, operation frequency, dynamic range, etc. that are scalable to biological systems with comparable complexity.
引用
收藏
页码:1062 / 1065
页数:4
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