Breakdown and optical response of CMOS perimeter gated single-photon avalanche diodes

被引：2
|
作者：
Habib, M. H. U. [1 ]
McFarlane, N. [1 ]
机构：
[1] Univ Tennessee, Dept Elect Engn & Comp Sci, Knoxville, TN 37996 USA
来源：
ELECTRONICS LETTERS | 2017年 / 53卷 / 19期
关键词：
CMOS integrated circuits; avalanche breakdown; avalanche photodiodes; integrated optoelectronics; optical response; CMOS perimeter gated single-photon avalanche diodes; standard 2-poly 3-metal CMOS process; premature edge breakdown; polysilicon gate; electric field; breakdown voltage; physical device simulations; size; 0; 5; mum;
D O I：
10.1049/el.2017.2485
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The breakdown and optical response of perimeter gated single-photon avalanche diodes fabricated in a standard 0.5 m 2-poly 3-metal CMOS process is presented. These diodes prevent premature edge breakdown through the addition of a polysilicon gate. The fabricated devices feature varying size, shape (square, octagonal, and circular), and junction types (nwell-p(+) and psub-nwell) with a perimeter gate located on top of the junction. Voltage applied to the gate modulates the electric field and its effect on the breakdown voltage and optical response is discussed. Experimental results are supported by physical device simulations where applicable.
引用
收藏
页码：1323 / 1325
页数：2
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