A 1.8pJ/b 56Gb/s PAM-4 Transmitter with Fractionally Spaced FFE in 14nm CMOS

被引:0
作者
Dickson, Timothy O. [1 ]
Ainspan, Herschel A. [1 ]
Meghelli, Mounir [1 ]
机构
[1] IBM TJ Watson Res Ctr, Yorktown Hts, NY USA
来源
2017 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC) | 2017年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
6.5
引用
收藏
页码:118 / 118
页数:1
相关论文
共 6 条
  • [1] Bassi M, 2016, ISSCC DIG TECH PAP I, V59, P66, DOI 10.1109/ISSCC.2016.7417909
  • [2] Chiang PC, 2014, ISSCC DIG TECH PAP I, V57, P42, DOI 10.1109/ISSCC.2014.6757329
  • [3] FRACTIONALLY-SPACED EQUALIZATION - AN IMPROVED DIGITAL TRANSVERSAL EQUALIZER
    GITLIN, RD
    WEINSTEIN, SB
    [J]. BELL SYSTEM TECHNICAL JOURNAL, 1981, 60 (02): : 275 - 296
  • [4] Kim J, 2015, ISSCC DIG TECH PAP I, V58, P60, DOI 10.1109/ISSCC.2015.7062925
  • [5] An 80 mW 40 Gb/s 7-Tap T/2-Spaced Feed-Forward Equalizer in 65 nm CMOS
    Momtaz, Afshin
    Green, Michael M.
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45 (03) : 629 - 639
  • [6] Nazemi A, 2015, ISSCC DIG TECH PAP I, V58, P58, DOI 10.1109/ISSCC.2015.7062924