END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator

被引:0
作者
Rai, Shubham [1 ]
Gupta, Nishant [1 ]
Bhattacharjee, Abhiroop [1 ]
Rupani, Ansh [1 ]
Raitza, Michael [1 ]
Trommer, Jens [2 ]
Mikolajick, Thomas [2 ]
Kumar, Akash [1 ]
机构
[1] Tech Univ Dresden, Chair Processor Design, Dresden, Germany
[2] NaMLab gGmbH, Dresden, Germany
来源
VLSI-SOC: TECHNOLOGY ADVANCEMENT ON SOC DESIGN (VLSI-SOC 2021) | 2022年 / 661卷
关键词
Reconfigurable field effect transistor (RFET); True Random Number Generator (TRNG); Metastability; NIST benchmark suite; Von-Neumann extraction; LINEWIDTH ROUGHNESS LWR; SILICON NANOWIRE FETS; TECHNOLOGY; SECURITY; SPEED; IMPLEMENTATION; TRANSISTOR; POLARITY; LATCHES; DEVICES;
D O I
10.1007/978-3-031-16818-5_9
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
True Random Number Generators (TRNGs) are essential primitives in any cryptographic system. They provide the foundation to secure authorization and authentication. This work proposes a generator that exploits the metastability effect of cross-coupled logic gates, as found in SR latches. Based on emerging reconfigurable transistor technology, a random number generator design has been proposed that doubles the throughput, compared to a similar standard CMOS design, by exploiting transistor-level reconfiguration. The proposed design is superior in terms of the number of transistors per block, power consumption and in critical path delay with respect to its CMOS counterpart. Random Number bit sequence are generated by operating the given design at three operating frequencies of 10 MHz, 100MHz and 200 MHz. Firstly, the Shannon entropy for the generated bit sequence is measured, and then the generated bit sequence are subjected to statistical evaluation using the NIST benchmark suite. The P' values for the NIST benchmarks is above the accepted threshold, which underlines the assumption that the designed circuit produces the random numbers based on the metastability effect.
引用
收藏
页码:175 / 203
页数:29
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