Test method for crosstalk-induced delay faults in digital circuits

For the current circuit design technology, due to the increased device density and circuit speed, crosstalk effects are induced between some circuit elements. One of the main types of crosstalk effects is crosstalk-induced delay, it can results in logic errors. A test method for the crosstalk- induced delay faults in digital circuits is presented in this paper. The method consists of following two steps. First of all, an energy function for each basic gate circuit such as AND gate and OR gate is defined. Secondly, an improved genetic algorithm is used to compute the global minima of energy function corresponding to the circuit under test, thus the test vectors of the crosstalk-induced delay faults are generated. Experimental results show the method proposed in this paper is able to produce the test vectors of crosstalk-induced delay if there are the test vectors for the delay faults.