A low power-delay-product multiplier with dynamic operand exchange

An n-bit by n-bit multiplication can be carried out iteratively by employing an n-bit by (n/k)-bit multiplier. A multiplication, usually requiring k cycles to complete, can be terminated earlier if some of the leading significant bytes are all zeros or ones. This paper proposes a simple scheme to exchange the two operands dynamically to reduce more cycles for 32-bit by 32-bit multiplications. Tested by some speech sample data shows 36% reduction in power-delay product. Tested by random data shows more power-delay product reduction for most of the cases and only a smalt degree of counterproductive effect for the worst cases.