An analytical subthreshold current model for pocket-implanted NMOSFETs

被引:16
作者
Ho, CS [1 ]
Liou, JJ
Huang, KY
Cheng, CC
机构
[1] ProMOS Technol, R&D Div, Hsinchu 300, Taiwan
[2] Univ Cent Florida, Sch Elect Engn & Comp Sci, Orlando, FL 32816 USA
关键词
modeling; MOSFET; pocket implantation; subthreshold current;
D O I
10.1109/TED.2003.813340
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analytical subthreshold current model for metal oxide semiconductor field effect transistors (MOSFETs) with pocket implantation is presented. The model is developed based on considering an averaged localized pileup of channel dopants near the source and drain ends of channel to account for the pocket implantation effect and to derive the channel potential using a pseudo-two-dimensional (2-D) method. This, together with the conventional drift-diffusion theory, leads to the development of a subithrehold current model for pocket-implanted MOS devices. Model verification is carried out using data measured from a set of pocket-implanted NMOSFETs fabricated from a 0.17-mum, DRAM process. Very good agreement is obtained between the model calculations and measurement results.
引用
收藏
页码:1475 / 1479
页数:5
相关论文
共 16 条
[1]  
*AV CORP, 2001, SUPR MED MAN
[2]   A drain current model for MOSFET's with pocket implantation [J].
Chang, YH ;
Ho, CS ;
Liao, WT ;
Liu, CC .
PROCEEDINGS 2001 IEEE HONG KONG ELECTRON DEVICES MEETING, 2001, :42-45
[3]   Modeling reverse short channel and narrow width effects in small size MOSFET's for circuit simulation [J].
Cheng, YH ;
Sugii, T ;
Chen, K ;
Liu, ZH ;
Jeng, MC ;
Hu, CM .
SISPAD '97 - 1997 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 1997, :249-252
[4]   THRESHOLD VOLTAGE MODELING AND THE SUBTHRESHOLD REGIME OF OPERATION OF SHORT-CHANNEL MOSFETS [J].
FJELDLY, TA ;
SHUR, M .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (01) :137-145
[5]   A SELF-ALIGNED POCKET IMPLANTATION (SPI) TECHNOLOGY FOR 0.2-MU-M DUAL-GATE CMOS [J].
HORI, A ;
SEGAWA, M ;
SHIMOMURA, H ;
KAMEYAMA, S .
IEEE ELECTRON DEVICE LETTERS, 1992, 13 (04) :174-176
[6]   QUARTER-MICROMETER SPI (SELF-ALIGNED POCKET IMPLANTATION) MOSFETS AND ITS APPLICATION FOR LOW SUPPLY VOLTAGE OPERATION [J].
HORI, A ;
HIROKI, A ;
NAKAOKA, H ;
SEGAWA, M ;
HORI, T .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1995, 42 (01) :78-86
[7]   0.3-MU-M MIXED ANALOG-DIGITAL CMOS TECHNOLOGY FOR LOW-VOLTAGE OPERATION [J].
ISHII, T ;
MIYAMOTO, M ;
NAGAI, R ;
NISHIDA, T ;
SEKI, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (10) :1837-1842
[8]  
Jiang C, 1995, PROCEEDINGS OF THE FOURTH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, pA224
[9]  
KAHNG JR, 1999, P 1999 IEEE INT C VL, P518
[10]   A predictive semi-analytical threshold voltage model for deep-submicron MOSFET's [J].
Lim, KY ;
Zhou, X ;
Lim, D ;
Zu, Y ;
Ho, HM ;
Loiko, K ;
Lau, CK ;
Tse, MS ;
Choo, SC .
1998 IEEE HONG KONG ELECTRON DEVICES MEETING, PROCEEDINGS, 1998, :114-117