A programmable state machine architecture for packet processing

被引：3

作者：

Lai, WY ^{[1
]}

Lea, CT ^{[1
]}

机构：

[1] Hong Kong Univ Sci & Technol, Dept Elect Engn, Kowloon, Hong Kong, Peoples R China

来源：

IEEE MICRO | 2003年 / 23卷 / 04期

关键词：

D O I：

10.1109/MM.2003.1225965

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

THOUGH COMPLEX AND EXPENSIVE, PACKET PROCESSORS ARE PROGRAMMABLE AND CAN EASILY HANDLE PROTOCOL CHANGES. THEY ARE THUS INCREASINGLY ATTRACTIVE FOB PROTOCOL PROCESSING.

引用

页码：32 / 42

页数：11

共 6 条

[1]

ALEXANDER P, 2001, APPL PROGRAMMABLE MU

[2]

GWENNAP L, 2000, EE TIMES 0619

[3]

Hennessy John L., 1997, Computer Organization and Design: The Hardware/Software Interface, VSecond

[4] Network processors: A perspective on market requirements, processor architectures and embedded S/W tools [J].

Paulin, PG ;

Karim, F ;

Bromley, P .

DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, :420-427

[5]

SHERMAN D, 2001, EE TIMES 1123

[6]

SHIMONISHI H, P 2001 IEEE WORKSH H

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