A power efficient 26-GHz 32:1 static frequency divider in 130-nm bulk CMOS

被引:42
作者
Cao, CH [1 ]
O, KK [1 ]
机构
[1] Univ Florida, Dept Elect & Comp Engn, Silicon Microwave Integrated Circuits & Syst Grp, Gainesville, FL 32611 USA
关键词
complementary metal-oxide semiconductor (CMOS); current mode logic (CML); frequency divider;
D O I
10.1109/LMWC.2005.858998
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 32:1 static frequency divider consisting of five stages of 2:1 dividers using current mode logic (CML) was fabricated in a 130-mn bulk complementary metal-oxide semiconductor (CMOS) logic process. By optimizing transistors size, high operating speed is achieved with limited power consumption. For an input power of 0 dBm, the 32:1 divider operates up to 26 GHz with a 1.5-V supply voltage. The whole 32:1 chain including buffers consumes 8.97 mW and the first stage consumes only 3.88 mW at a 26-GHz operation. The power consumption of the first 2:1 stage is less than 15% of other bulk CMOS static frequency dividers operating at the same frequency.
引用
收藏
页码:721 / 723
页数:3
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