A modem in CMOS technology for data communication on the low-voltage power line

被引：3
|
作者：
Guerra, O [1 ]
Domínguez-Matas, CM [1 ]
Escalera, S [1 ]
García-González, JM [1 ]
Liñán, G [1 ]
del Río, R [1 ]
Delgado-Restituto, M [1 ]
Rodríguez-Vázquez, A [1 ]
机构：
[1] CNM, IMSE, Seville 41012, Spain
来源：
INTEGRATION-THE VLSI JOURNAL | 2003年 / 36卷 / 04期
关键词：
power line communications; mixed-signal CMOS design; FSK modulation;
D O I：
10.1016/j.vlsi.2003.09.007
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a CMOS 0.8 mum mixed-signal half-duplex Modem ASIC for data transmission on the low-voltage power line. It includes all the analog circuitry needed for input interfacing and modulation/ demodulation (low-noise amplifier, PLL-based frequency synthesis, tunable filter banks, and decision circuitry), logic circuitry for control purposes, and an output amplifier used as front-end for an off-chip line driver. The chip demodulates signals down to 283muV(rms) (these are worst case values among 30 randomly-selected samples used as vehicles for detailed electrical characterization; most of the samples featured 200 muV(rms), sensitivity; bit error rate (BER) is below 0.5 x 10(-5)) at 10 kbps, and operates correctly in the whole industrial temperature range, from -45degreesC to 80degreesC, under 5% variations of the 5V supply voltage. This ASIC is now in commercial production. (C)2003 Published by Elsevier B.V.
引用
收藏
页码：229 / 236
页数：8
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