On-Chip Single Tone Pseudo-Noise Generator for Analog IP Noise Tolerance Measurement

被引:0
作者
Soda, Masaaki [1 ]
Bando, Yoji [1 ]
Takaya, Satoshi [1 ]
Ohkawa, Toru
Takaramoto, Toshiharu
Yamada, Toshio
Kumashiro, Shigetaka
Mogami, Tohru
Nagata, Makoto [1 ]
机构
[1] Kobe Univ, Dept Comp Sci & Syst Engn, Kobe, Hyogo 6578501, Japan
来源
IEICE TRANSACTIONS ON ELECTRONICS | 2011年 / E94C卷 / 06期
关键词
noise; sine wave; harmonic;
D O I
10.1587/transele.E94.C.1024
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A single tone pseudo-noise generator with a harmonic-eliminated waveform is proposed for measuring noise tolerance of analog IPs. In the waveform, the harmonics up to the thirteenth are eliminated by combining seven rectangular waves with 22.5- degree spacing phases. The proposed waveform includes only high region frequency harmonic components, which are easily suppressed by a low-order filter. This characteristic enables simple circuit implementation for a sine wave generator. In the circuit, the harmonic eliminated waveform generator is combined with a current controlled oscillator and a frequency adjustment circuit. The single tone pseudo-noise generator can generate power line noise from 20 MHz to 220 MHz with I MHz steps. The SFDR of 40 dB is obtained at the noise frequency of 100 MHz. The circuit enables the measurement of frequency response characteristics measurements such as PSRR.
引用
收藏
页码:1024 / 1031
页数:8
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