A design methodology for a very low noise figure common-source LNA

被引:0
|
作者
Zhu, YB [1 ]
Al-Sarawi, S [1 ]
Liebelt, M [1 ]
机构
[1] Univ Adelaide, Sch Elect & Elect Engn, Adelaide, SA 5005, Australia
关键词
D O I
10.1117/12.580705
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The design of common source (CS) Low Noise Amplifiers (LNA) for wireless receivers is presented. The design, trade-offs between main criteria are discussed. An extra gate-to-source capacitor is added to the input transistor to reduce the transistor dimension while still satisfying the noise matching. The small MOSFET also improves the LNA linearity with comparatively small drain-source current. The extra gate-to-source capacitor is introduced by the 4 bonding-pad parasitic capacitor; hence a negative effect parasitic capacitance is turned into a useful capacitor. The simulated Noise Figure (NF) of two single-ended LNAs using 0.18 mu m CMOS process achieve 0.62 dB and 0.92 dB at 2.4 GHz and 5.25 GHz respectively while matching a 50 ohm impedance.
引用
收藏
页码:31 / 43
页数:13
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