Post-Silicon Microarchitecture

被引:3
作者
Kumar, Chanchal [1 ]
Chaudhary, Aayush [1 ]
Bhawalkar, Shubham [1 ]
Mathur, Utkarsh [1 ]
Jain, Saransh [1 ]
Vastrad, Adith [1 ]
Rotenberg, Eric [1 ]
机构
[1] North Carolina State Univ, Raleigh, NC 27695 USA
关键词
Microarchitecture; Payloads; Fabrics; Indexes; Prefetching; Registers; Synchronization; Adaptable architectures; microarchitecture; reconfigurable hardware;
D O I
10.1109/LCA.2020.2978841
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Microprocessors are designed to provide good general performance across a range of benchmarks. As such, microarchitectural techniques which provide good speedup for only a small subset of applications are not attractive when designing a general-purpose core. We propose coupling a reconfigurable fabric with the CPU, on the same chip, via a simple and flexible interface to allow post-silicon development of application-specific microarchitectures. The interface supports observation and intervention at key pipeline stages of the CPU, so that exotic microarchitecture designs (with potentially narrow applicability) can be synthesized in the reconfigurable fabric and seem like components that were hardened into the core.
引用
收藏
页码:26 / 29
页数:4
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