Quantifying the reduction in collected charge and soft errors in the presence of guard rings

被引:16
作者
Narasimham, Balaji [1 ]
Shuler, Robert L. [2 ]
Black, Jeffrey D. [1 ]
Bhuva, Bharat L. [1 ]
Schrimpf, Ronald D. [1 ]
Witulski, Arthur F. [1 ]
Holman, William Timothy [1 ]
Massengill, Lloyd W. [1 ]
机构
[1] Vanderbilt Univ, Nashville, TN 37235 USA
[2] NASA, Lyndon B Johnson Space Ctr, Avion Syst Div, Houston, TX 77058 USA
关键词
collected charge; guard rings (GRs); pulse-width; radiation hardening by design (RHBD); single event (SE); SE transient (SET); soft error; soft-error rate (SER);
D O I
10.1109/TDMR.2007.912778
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Soft errors pose a major reliability threat to advanced electronic components and systems. Novel techniques are needed to mitigate the soft-error rate (SER) of integrated circuits (ICs), and in some cases, a combination of different mitigation techniques may be required for significant performance improvements. In this paper, an autonomous single-event-transient (SET) pulse-width characterization technique is used to quantify the effect of hardened-by-design structures, such as guard rings (GRs), in reducing the collected charge and SER of ICs. Experimental results obtained for a 0.35-mu m technology show a reduced SET pulse-width for devices with GRs; the corresponding reduction in SER was estimated to be greater than 55% for technologies ranging from 0.35 mu m to 70 nm.
引用
收藏
页码:203 / 209
页数:7
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