ESD immunity in system designs, system field experiences and effects of PWB layout

被引：0

作者：

Smith, DC ^{[1
]}

Nakauchi, E ^{[1
]}

机构：

[1] DC Smith Consultants, Los Gatos, CA 95031 USA

来源：

ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, 2000 | 2000年

关键词：

D O I：

10.1109/EOSESD.2000.890026

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Soft errors as well as damage can be caused by ESD in electronic systems. Such effects have resulted in many problems with companies and customers incurring large costs. Effects on system immunity from printed wiring board layout will be covered and examples of field problems described. Suggestions on how to avoid such problems are given.

引用

页码：48 / 53

页数：2