Three-dimensional memristor circuits as complex neural networks

被引:298
作者
Lin, Peng [1 ,3 ]
Li, Can [1 ]
Wang, Zhongrui [1 ]
Li, Yunning [1 ]
Jiang, Hao [1 ]
Song, Wenhao [1 ]
Rao, Mingyi [1 ]
Zhuo, Ye [1 ]
Upadhyay, Navnidhi K. [1 ]
Barnell, Mark [2 ]
Wu, Qing [2 ]
Yang, J. Joshua [1 ]
Xia, Qiangfei [1 ]
机构
[1] Univ Massachusetts, Dept Elect & Comp Engn, Amherst, MA 01003 USA
[2] Air Force Res Lab Informat Directorate, Rome, NY USA
[3] MIT, Dept Mech Engn, Cambridge, MA 02139 USA
关键词
INTEGRATION; SYNAPSE; DEVICE;
D O I
10.1038/s41928-020-0397-9
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Constructing a computing circuit in three dimensions (3D) is a necessary step to enable the massive connections and efficient communications required in complex neural networks. 3D circuits based on conventional complementary metal-oxide-semiconductor transistors are, however, difficult to build because of challenges involved in growing or stacking multilayer single-crystalline silicon channels. Here we report a 3D circuit composed of eight layers of monolithically integrated memristive devices. The vertically aligned input and output electrodes in our 3D structure make it possible to directly map and implement complex neural networks. As a proof-of-concept demonstration, we programmed parallelly operated kernels into the 3D array, implemented a convolutional neural network and achieved software-comparable accuracy in recognizing handwritten digits from the Modified National Institute of Standard and Technology database. We also demonstrated the edge detection of moving objects in videos by applying groups of Prewitt filters in the 3D array to process pixels in parallel. A three-dimensional circuit composed of eight layers of monolithically integrated memristive devices is built and used to implement complex neural networks, demonstrating accurate MNIST classification and effective edge detection in videos.
引用
收藏
页码:225 / 232
页数:8
相关论文
共 31 条
[1]   3-D Memristor Crossbars for Analog and Neuromorphic Computing Applications [J].
Adam, Gina C. ;
Hoskins, Brian D. ;
Prezioso, Mirko ;
Merrikh-Bayat, Farnood ;
Chakrabarti, Bhaswar ;
Strukov, Dmitri B. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (01) :312-318
[2]  
Agarwal S, 2017, S VLSI TECH, pT174, DOI 10.23919/VLSIT.2017.7998164
[3]   Equivalent-accuracy accelerated neural-network training using analogue memory [J].
Ambrogio, Stefano ;
Narayanan, Pritish ;
Tsai, Hsinyu ;
Shelby, Robert M. ;
Boybat, Irem ;
di Nolfo, Carmelo ;
Sidler, Severin ;
Giordano, Massimo ;
Bodini, Martina ;
Farinha, Nathan C. P. ;
Killeen, Benjamin ;
Cheng, Christina ;
Jaoudi, Yassine ;
Burr, Geoffrey W. .
NATURE, 2018, 558 (7708) :60-+
[4]   Neuromorphic Learning and Recognition With One-Transistor-One-Resistor Synapses and Bistable Metal Oxide RRAM [J].
Ambrogio, Stefano ;
Balatti, Simone ;
Milo, Valerio ;
Carboni, Roberto ;
Wang, Zhong-Qiang ;
Calderoni, Alessandro ;
Ramaswamy, Nirmal ;
Ielmini, Daniele .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (04) :1508-1515
[5]  
[Anonymous], 2017 IEEE INT EL DEV
[6]   A fully integrated reprogrammable memristor-CMOS system for efficient multiply-accumulate operations [J].
Cai, Fuxi ;
Correll, Justin M. ;
Lee, Seung Hwan ;
Lim, Yong ;
Bothra, Vishishtha ;
Zhang, Zhengya ;
Flynn, Michael P. ;
Lu, Wei D. .
NATURE ELECTRONICS, 2019, 2 (07) :290-299
[7]  
Chen WH, 2018, ISSCC DIG TECH PAP I, P494, DOI 10.1109/ISSCC.2018.8310400
[8]   SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations [J].
Choi, Shinhyun ;
Tan, Scott H. ;
Li, Zefan ;
Kim, Yunjo ;
Choi, Chanyeol ;
Chen, Pai-Yu ;
Yeon, Hanwool ;
Yu, Shimeng ;
Kim, Jeehwan .
NATURE MATERIALS, 2018, 17 (04) :335-+
[9]   Demonstration of Convolution Kernel Operation on Resistive Cross-Point Array [J].
Gao, Ligang ;
Chen, Pai-Yu ;
Yu, Shimeng .
IEEE ELECTRON DEVICE LETTERS, 2016, 37 (07) :870-873
[10]  
Glorot X etal, 2011, AIstats, P315