A High-Efficiency 142-182-GHz SiGe BiCMOS Power Amplifier With Broadband Slotline-Based Power Combining Technique

被引:42
作者
Li, Xingcun [1 ]
Chen, Wenhua [1 ]
Li, Shuyang [1 ]
Wang, Yunfan [1 ]
Huang, Fei [1 ]
Yi, Xiang [2 ]
Han, Ruonan [3 ]
Feng, Zhenghe [1 ]
机构
[1] Tsinghua Univ, Dept Elect Engn, Beijing 100084, Peoples R China
[2] South China Univ Technol, Sch Microelect, Guangzhou 510641, Peoples R China
[3] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
基金
中国国家自然科学基金;
关键词
Slot lines; Topology; Power combiners; Microstrip; Impedance; Circuit faults; Power generation; Broadband power combiner; grounded coplanar waveguide (GCPW); high-efficiency; hybrid power combining; mm-Wave power amplifier (PA); SiGe; slotline; transformer; OUTPUT POWER; WIDE-BAND; 18; DBM; CMOS; TRANSFORMER; DESIGN; GHZ; SILICON; ARRAY; PAE;
D O I
10.1109/JSSC.2021.3107428
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this article, a high-efficiency broadband millimeter-wave (mm-Wave) integrated power amplifier (PA) with a low-loss slotline-based power combing technique is proposed. The proposed slotline-based power combiner consists of grounded coplanar waveguide (GCPW)-to-slotline transitions and folded slots to simultaneously achieve power combining and impedance matching. This technique provides a broadband parallel-series combining method to enhance the output power of PAs at mm-Wave frequencies while maintaining the compact area and high efficiency. As a proof of concept, a compact four-to-one hybrid power combiner is implemented in a 130-nm SiGe BiCMOS back-end-of-line (BEOL) process, which leads to a small die area of 126 mu m x 240 mu m and a low measured insertion loss of 0.5 dB. The 3-dB bandwidth is over 80 GHz covering the whole G-band (140-220 GHz). Based on this structure, a high-efficiency mm-Wave PA has been fabricated in the 130-nm SiGe BiCMOS technology. The three-stage PA achieves a peak power gain of 30.7 dB, 3-dB small-signal gain bandwidth of 40 GHz from 142 to 182 GHz, a measured maximum saturated output power of 18.1 dBm, and a peak power-added efficiency (PAE) of 12.4% at 161 GHz. The extremely compact power combining methodology leads to a small core area of 488 mu m x 214 mu m and an output power per unit die area of 662 mW/mm(2).
引用
收藏
页码:371 / 384
页数:14
相关论文
共 56 条
[1]  
Abiri B, 2018, ISSCC DIG TECH PAP I, P404, DOI 10.1109/ISSCC.2018.8310355
[2]   An mm-Wave Scalable PLL-Coupled Array for Phased-Array Applications in 65-nm CMOS [J].
Afzal, Hamidreza ;
Abedi, Razieh ;
Kananizadeh, Rouzbeh ;
Heydari, Payam ;
Momeni, Omeed .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2021, 69 (02) :1439-1452
[3]   168-195 GHz Power Amplifier With Output Power Larger Than 18 dBm in BiCMOS Technology [J].
Ali, Abdul ;
Yun, Jongwon ;
Giannini, Franco ;
Ng, Herman Jalli ;
Kissinger, Dietmar ;
Colantonio, Paolo .
IEEE ACCESS, 2020, 8 :79299-79309
[4]   Power-combining transformer techniques for fully-integrated CMOS power amplifiers [J].
An, Kyu Hwan ;
Lee, Ockgoo ;
Kim, Hyungwook ;
Lee, Dong Ho ;
Han, Jeonghu ;
Yang, Ki Seok ;
Kim, Younsuk ;
Chang, Jae Joon ;
Woo, Wangmyong ;
Lee, Chang-Ho ;
Kim, Haksun ;
Laskar, Joy .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (05) :1064-1075
[5]   Millimeter-Wave Wafer-Scale Silicon BiCMOS Power Amplifiers Using Free-Space Power Combining [J].
Atesal, Yusuf A. ;
Cetinoneri, Berke ;
Chang, Michael ;
Alhalabi, Ramadan ;
Rebeiz, Gabriel M. .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2011, 59 (04) :954-965
[6]  
Bameril H, 2020, IEEE RAD FREQ INTEGR, P191, DOI [10.1109/RFIC49505.2020.9218441, 10.1109/rfic49505.2020.9218441]
[7]  
Bao MQ, 2017, EUR MICROW CONF, P1017, DOI 10.23919/EuMC.2017.8231019
[8]   A Broadband Stacked Power Amplifier in 45-nm CMOS SOI Technology [J].
Chen, Jing-Hwa ;
Helmi, Sultan R. ;
Azadegan, Reza ;
Aryanfar, Farshid ;
Mohammadi, Saeed .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (11) :2775-2784
[9]  
Chi TY, 2017, ISSCC DIG TECH PAP I, P296, DOI 10.1109/ISSCC.2017.7870378
[10]   Design of a V-Band 20-dBm Wideband Power Amplifier Using Transformer-Based Radial Power Combining in 90-nm CMOS [J].
Chou, Cheng-Feng ;
Hsiao, Yuan-Hung ;
Wu, Yi-Ching ;
Lin, Yu-Hsuan ;
Wu, Chen-Wei ;
Wang, Huei .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2016, 64 (12) :4545-4560