Fast deblocking filter with highly parallel and pipelined architecture for H.264/AVC decoder

被引:0
作者
Meng, N. [1 ]
Zhang, Q. H. [2 ]
机构
[1] Beijing Univ Posts & Telecommun, Sch Elect Engn, Beijing 100088, Peoples R China
[2] Henan Univ, Sch Phys & Elect, Kaifeng 475004, Peoples R China
关键词
deblocking filter; H.264/AVC; filtering order; throughput; VLSI;
D O I
10.1179/1743131X10Y.0000000015
中图分类号
TB8 [摄影技术];
学科分类号
0804 ;
摘要
The deblocking filter (DBF) is a system bottleneck of the whole decoder in terms of processing cycles. Based on the study and analysis of the basic filtering order and previously presented filtering orders, we put forward a competitive filtering scheme to reduce the filtering cycles and improve the system throughput. Then, a highly parallel and pipelined deblocking filter architecture is proposed accordingly. Comparison of various DBF solutions shows that the system performance of our proposal significantly outperforms the previous designs from 3.7 to 8.3 times. Moreover, our architecture can easily support real-time deblocking of 60 fps HDTV video, and it can be suitably integrated into the H.264/AVC decoder.
引用
收藏
页码:274 / 277
页数:4
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