Selective Harmonic Mitigation Technique for Multilevel Cascaded H-bridge Converters

被引:15
作者
Napoles, Javier [1 ]
Leon, Jose I. [1 ]
Franquelo, Leopoldo G. [1 ]
Portillo, Ramon [1 ]
Aguirre, Miguel A. [1 ]
机构
[1] Univ Seville, Dept Elect Engn, Sch Engn, Seville 41092, Spain
来源
IECON: 2009 35TH ANNUAL CONFERENCE OF IEEE INDUSTRIAL ELECTRONICS, VOLS 1-6 | 2009年
关键词
ELIMINATION;
D O I
10.1109/IECON.2009.5415023
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The increasing demand of energy and proliferation of non-linear loads have leaded to the appearance of new grid cods which limit the maximum acceptable harmonic levels. In this context, multilevel topologies are very attractive because can generate output waveforms with a low harmonic content using a low switching frequency. In this paper, the recently presented selective harmonic mitigation technique (SHMPWM) is adapted to a nine-level converter. Its flexibility is exploited to meet the EN 50160 and CIGRE WG 36-05 grid codes without any additional filtering system using 10 switching angles per quarter of period in a wide range of amplitudes of the fundamental harmonic from 0.70 to 1.22. Some results validating this technique applied to this topology are presented. A comparison with the well known selective harmonic elimination method is included showing the advantages of the SHMPWM technique.
引用
收藏
页码:806 / 807
页数:2
相关论文
共 21 条
[1]   On attaining the multiple solutions of selective harmonic elimination PWM three-level waveforms through function minimization [J].
Agelidis, Vassilios G. ;
Balouktsis, Anastasios I. ;
Cossar, Calum .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2008, 55 (03) :996-1004
[2]  
[Anonymous], 2001, 50160 CENELEC EN
[3]  
DAHIDAH M, 2006, 37 IEEE POW EL SPEC, P1472
[4]   Reduced switching-frequency active harmonic elimination for multilevel converters [J].
Du, Zhong ;
Tolbert, Leon M. ;
Chiasson, John N. ;
Ozpineci, Burak .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2008, 55 (04) :1761-1770
[5]   A flexible selective harmonic mitigation technique to meet grid codes in three-level PWM converters [J].
Franquelo, Leopoldo G. ;
Napoles, Javier ;
Portillo Guisado, Ramon C. ;
Leon, Jose Ignacio ;
Aguirre, Miguel A. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2007, 54 (06) :3022-3029
[6]   The Age of Multilevel Converters Arrives [J].
Franquelo, Leopoldo G. ;
Rodriguez, Jose ;
Leon, Jose I. ;
Kouro, Samir ;
Portillo, Ramon ;
Prats, Maria M. .
IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 2008, 2 (02) :28-39
[7]  
Huang M. D., 1986, IEEE International Conference on Computer-Aided Design: ICCAD-86. A Conference for the EE CAD Professional. Digest of Technical Papers (Cat. No.86CH2353-1), P381
[8]   OPTIMIZATION BY SIMULATED ANNEALING [J].
KIRKPATRICK, S ;
GELATT, CD ;
VECCHI, MP .
SCIENCE, 1983, 220 (4598) :671-680
[9]   Comparison of 2.3-kV medium-voltage multilevel converters for industrial medium-voltage drives [J].
Krug, Dietmar ;
Bernet, Steffen ;
Fazel, Seyed Saeed ;
Jahli, Kamran ;
Malinowski, Mariusz .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2007, 54 (06) :2979-2992
[10]   A multiobjective genetic algorithm for optimizing the performance of hard disk drive motion control system [J].
Low, Kay-Soon ;
Wong, Tze-Shyan .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2007, 54 (03) :1716-1725