High density electronics packaging assessment for military environment

被引:0
作者
Siméus, EJ [1 ]
Stegura, SR [1 ]
Mehrotra, M [1 ]
Smedley, RW [1 ]
机构
[1] Raytheon Elect Syst, Tucson, AZ USA
来源
FIFTH ANNUAL PAN PACIFIC MICROELECTRONICS SYMPOSIUM, PROCEEDINGS | 2000年
关键词
BGA; CSP; Microvia; PWB; daisy chain; X-ray; reflow; assembly; solder;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Raytheon Electronic Systems has been aggressively pursuing high-density electronics packaging technologies such as Ball Grid Array (BGA) and Chip Scale Packaging (CSP) for its military and space applications. Because of the rapid pace of integrated circuit technology where the silicon technology industry is already moving toward systems-on-chip (SOC), it becomes crucial and apparent that the electronics packaging industry must continue to meet the needs of the silicon density proliferation. Design and manufacturing engineers must stay abreast of the rapidly changing high-density packaging technology and its applications. Raytheon plays an important and active role with the EGA and CSP "in-kind" consortia started in 1995 and 1997, respectively. The consortia consist of many companies with diverse disciplines from commercial to space and aerospace industries. This paper will highlight Raytheon's role with the consortia for the current Microvia PWB test vehicle design which encompasses new generation CSPs, Microvia board fabrication and to some extent PWB assembly.
引用
收藏
页码:107 / 112
页数:6
相关论文
共 4 条
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MCCLURE D, 1999, ENG EVALUATION NOV
[2]  
SIMEUS EJ, 1999, 4 ANN PAN PAC MICR K
[3]  
SIMEUS EJ, CHIP SCAL INT S MAY
[4]  
WALKER J, 1999, SEMICONDUCTOR M 1101