Conductance of single-electron transistor with single island

With the decrease of the feature size of MOS based circuits, the power consumption of micro-processors has dramatically increased during the last decade, which now mainly restricts the development of the micro-processors. Single-electronic transistors (SETs) are considered as the attractive candidates for post-COMS VLSI due to their ultra-small size and low power consumption. Based on Orthodox theory, the model of conductance is investigated in detail. The conductance of SET with single island is in damped oscillation with a period of T(V-ds), and it is close to an intrisical value with the increase of vertical bar V-ds vertical bar. This characteristic of G(ds) is affected by temperature, parameters of junctions, and so on. The results show that the analysis of conductance is very useful for the very large scale integration of SET devices.