Drilling, bonding, and forming conductive path in the hole by laser percussion drilling

被引:6
作者
Sato, Shun [1 ]
Hidai, Hirofumi [1 ]
Matsusaka, Souta [1 ]
Chiba, Akira [1 ]
Morita, Noboru [1 ]
机构
[1] Chiba Univ, Dept Mech Engn, Inage Ku, 1-33 Yayoi Cho, Chiba 2638522, Japan
来源
PRECISION ENGINEERING-JOURNAL OF THE INTERNATIONAL SOCIETIES FOR PRECISION ENGINEERING AND NANOTECHNOLOGY | 2020年 / 61卷
基金
日本科学技术振兴机构;
关键词
Laser drilling; Glass; Deposition; Copper; Bonding; VIAS; SILICON;
D O I
10.1016/j.precisioneng.2019.10.007
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Several studies have focused on the electrical connections between the front and rear surfaces of stacked substrates in order to improve device performance. The fabrication and mounting process of the substrates involves three steps: (1) through-hole drilling, (2) formation of a conductive path inside the hole, and (3) physical bonding and electrical wiring connection of the substrates. In this paper, we demonstrate a technique for performing the process above simultaneously by laser percussion drilling. A borosilicate glass sample was used as the substrate, while copper was used as the wiring material. The substrate was drilled to a diameter of 30 mu m by laser radiation, while the copper was evaporated and deposited in a similar to 12-mu m-thick layer on the inner surface of a glass-copper hole. Hence, a conductive path was formed inside the glass hole, facilitating bonding and conduction between the glass substrate and the copper sheet. The conductivity and bonding strength per 100 points between the glass surface and the copper sheet were similar to 5 Omega and similar to 1 N respectively. Furthermore, gaps were observed between the glass substrate and the copper sheet by energy dispersive X-ray analysis using a scanning electron microscope. However, the glass substrate and the copper sheet were bonded by the formation of a redeposited layer on the inner surface of the hole and in the gap between the glass and copper surfaces.
引用
收藏
页码:147 / 151
页数:5
相关论文
共 14 条
[1]  
Aoyagi M, 2014, Patent No. [W02014/045828, 2014045828]
[2]   Fabrication of high aspect ratio 35 μm pitch interconnects for next generation 3-D wafer level packaging by through-wafer copper electroplating [J].
Dixit, Pradeep ;
Miao, Jianmin .
56TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE 2006, VOL 1 AND 2, PROCEEDINGS, 2006, :388-+
[3]   Laser Drilling and Conducting Film Formation of Vias in Silicon [J].
Hidai, Hirofumi ;
Matsusaka, Souta ;
Chiba, Akira ;
Morita, Noboru .
JOURNAL OF ELECTRONIC MATERIALS, 2015, 44 (12) :4928-4932
[4]   CHEMICAL BONDING AND REACTION AT METAL POLYMER INTERFACES [J].
HO, PS ;
HAHN, PO ;
BARTHA, JW ;
RUBLOFF, GW ;
LEGOUES, FK ;
SILVERMAN, BD .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A-VACUUM SURFACES AND FILMS, 1985, 3 (03) :739-745
[5]   HIGH-RESOLUTION PHOTOEMISSION-STUDY OF THE INTERFACIAL REACTION OF CR WITH POLYIMIDE AND MODEL POLYMERS [J].
JORDAN, JL ;
KOVAC, CA ;
MORAR, JF ;
POLLAK, RA .
PHYSICAL REVIEW B, 1987, 36 (03) :1369-1377
[6]  
Katayama Seiji., 2007, Quarterly Journal of The Japan Welding Society, V25, P316, DOI DOI 10.2207/QJJWS.25.316
[7]  
Kim B, 2006, ELEC COMP C, P838
[8]   Reliability tests for a three dimensional chip stacking structure with through silicon via connections and low cost [J].
Kuo, Tzu-Ying ;
Chang, Shu-Ming ;
Shih, Ying-Ching ;
Chiang, Chia-Wen ;
Hsu, Chao-Kai ;
Lee, Ching Kuan ;
Lin, Chun-Te ;
Chen, Yu-Hua ;
Lo, Wei-Chung .
58TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, PROCEEDINGS, 2008, :853-858
[9]   Through-Silicon Via (TSV) [J].
Motoyoshi, Makoto .
PROCEEDINGS OF THE IEEE, 2009, 97 (01) :43-48
[10]  
National Astronomical Observatory of Japan, 2014, CHRON SCI TABL, P420