Characterizing the Electrical Properties of a Novel Junctionless Poly-Si Ultrathin-Body Field-Effect Transistor Using a Trench Structure

被引:28
作者
Yeh, Mu-Shih [1 ]
Wu, Yung-Chun [1 ]
Wu, Min-Hsin [1 ]
Chung, Ming-Hsien [1 ]
Jhan, Yi-Ruei [1 ]
Hung, Min-Feng [1 ]
机构
[1] Natl Tsing Hua Univ, Dept Engn & Syst Sci, Hsinchu 30013, Taiwan
关键词
Trench junctionless field-effect transistor (trench JL-FET); nanowires (NWs); and three-dimensional (3-D);
D O I
10.1109/LED.2014.2378785
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ultrathin channel trench junctionless poly-Si field-effect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness (T-CH) and gate length (L-G). These devices (L-G = 0.5 mu m) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high I-ON/I-OFF current ratio (10(6)A/A) and practically negligible drain-induced barrier lowering (similar to 0 mV/V). The I-ON current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications.
引用
收藏
页码:150 / 152
页数:3
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