共 11 条
[11]
Syed Ameer Abbas S., 2012, J WIRELESS NETWORKIN, V2, P14, DOI [10.5923/j.jwnc20120203.02, DOI 10.5923/J.JWNC20120203.02]
FPGA and ASIC implementation of reliable and effective architecture for a LTE downlink transmitter
被引：0
作者：
Wang, Zhou
[1
,2
]
Wu, Bin
[1
]
Ye, Tianchun
[1
]
机构：
[1] Chinese Acad Sci, Inst Microelect, Beijing, Peoples R China
[2] Univ Chinese Acad Sci, Beijing, Peoples R China
来源：
IEICE ELECTRONICS EXPRESS
|
2018年
/
15卷
/
20期
关键词：
LTE;
FPGA;
ASIC;
transmitter;
D O I：
10.1587/elex.15.20180790
中图分类号：
TM [电工技术];
TN [电子技术、通信技术];
学科分类号：
0808 ;
0809 ;
摘要：
Hardware implementation of LTE-Advanced systems using FPGA and ASIC technology is a highly promising technology. This article proposed a reliable and effective architecture for a LTE downlink transmitter under different antenna configurations including SISO 1x1; MIMO 2x2. The design has been synthesized using Altera Quartus II 13.1.4 on Altera Stratix-V 5SGSMD8K2F4012. The parameter improving cost is introduced to evaluate the upgrading of resources caused by performance improvement. With this proposed structure, improving cost can be reduced compared with traditional method. The proposed plan is fabricated as an ASIC using SMIC 55-nm CMOS technology. Finally, the design is demonstrated in the test platform, showing a successful performance.
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页数：12
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