Low power 8-b CMOS current steering folding-interpolating A/D converter
被引:2
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作者:
Cuong, Do Danh
论文数: 0引用数: 0
h-index: 0
机构:
Chungbuk Natl Univ, Cheongju, South KoreaChungbuk Natl Univ, Cheongju, South Korea
Cuong, Do Danh
[1
]
Cui, Zhi-Yuan
论文数: 0引用数: 0
h-index: 0
机构:
Chungbuk Natl Univ, Cheongju, South KoreaChungbuk Natl Univ, Cheongju, South Korea
Cui, Zhi-Yuan
[1
]
Kim, Nam-Soo
论文数: 0引用数: 0
h-index: 0
机构:
Chungbuk Natl Univ, Cheongju, South KoreaChungbuk Natl Univ, Cheongju, South Korea
Kim, Nam-Soo
[1
]
Lee, Kie-Yong
论文数: 0引用数: 0
h-index: 0
机构:
Chungbuk Natl Univ, Cheongju, South KoreaChungbuk Natl Univ, Cheongju, South Korea
Lee, Kie-Yong
[1
]
论文数: 引用数:
h-index:
机构:
Choi, Ho-Yong
[1
]
机构:
[1] Chungbuk Natl Univ, Cheongju, South Korea
来源:
IEICE TRANSACTIONS ON ELECTRONICS
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2008年
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E91C卷
/
01期
关键词:
A/D converter;
current steering folder;
interpolation;
CMOS process;
D O I:
10.1093/ietele/e91-c.1.81
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
This paper presents a CMOS A/D converter based on the folding and interpolating technique. A current steering folder composed of differential pairs allows low power operation and an interpolation is used for high speed with low supply voltage. In a folding circuit, only twenty-three MOSFETs are required to have eight reference voltages of an 8-b A/D converter. The interpolation is implemented with a current division technique to generate 32 folding signals. This approach requires much less area and power consumption than other conventional flash A/D converter. The simulation in a 0.35 mu m CMOS process achieves 8-b resolution at 250 Msample/s with power consumption 70 mW at 3.3 V power supply. The preliminary experiment indicates the current steering folder and coarse bits operate as expected.