In-situ surface passivation and metal-gate/high-κ dielectric stack formation for N-channel gallium arsenide metal-oxide-semiconductor field-effect transistors

被引:1
|
作者
Chin, Hock-Chun [1 ]
Zhu, Ming [1 ]
Whang, Sung-Jin [1 ]
Tung, Chih-Hang [2 ]
Samudra, Ganesh S. [1 ]
Yeo, Yee-Chia [1 ]
机构
[1] Natl Univ Singapore, Dept Elect & Comp Engn, Silicon Nano Device Lab, Singapore 117576, Singapore
[2] Inst Microelect, Singapore 117685, Singapore
来源
2008 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PROGRAM | 2008年
关键词
D O I
10.1109/VTSA.2008.4530782
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We demonstrate an in-situ surface passivation technique for the formation of high-permittivity gate dielectric on GaAs using a multiple chamber metal-organic chemical vapor deposition (MOCVD) system. In-situ vacuum annealing and SiH4 treatment were performed prior to high-kappa dielectric deposition. This novel passivation scheme effectively suppresses the formation of Ga or As oxide during the high-kappa dielectric deposition process. Self-aligned GaAs MOSFETs were fabricated, showing excellent device characteristics with a peak electron mobility of 1244.4 cm(2)/Vs. The effect of post deposition anneal (PDA) temperature and forming gas anneal (FGA) conditions on the GaAs MOS capacitors was also investigated. Using HIAlO as gate dielectric, the in-situ surface passivated GaAs MOS capacitors demonstrate low frequency dispersion, small hysteresis and low midgap interface state density (D-it) of 2.4 x 10(11) to 7.5 x 10(11) cm(-2).eV(-1), determined by high frequency conductance method.
引用
收藏
页码:26 / +
页数:2
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