A Σ-Δ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications

A fractional-N frequency synthesizer (FNFS) in 0.5-um SiGe BiCMOS technology is implemented. In order to operate wideband frequency range, a switched capacitor bank LC tank VCO and an Adaptive Frequency Calibration (AFC) technique are used. A 3-bit 4th order T-A modulator is used to reduce out-of-band phase noise and to meet a frequency resolution of less than 3Hz as well as agile switching time. The experimental results show -80dBc/Hz in-band phase noise within the loop bandwidth of 25kHz and -129dBclHz out-of-band phase noise at 400kHz-offset frequency. The fractional spurious is less than -70dBclHz at 300kHz offset frequency and the reference spur is -75dBclHz. The lock time is less than 150 As. The proposed synthesizer consumes 19.5mA from a single 2.8-V supply voltage and meets the requirements of GSM/GPRS/WCDMA applications.