PSO-Optimized SHE-PWM Technique in a Cascaded H-Bridge Multilevel Inverter for Variable Output Voltage Applications

被引:27
作者
Sadoughi, Milad [1 ]
Pourdadashnia, Amirhossein [1 ]
Farhadi-Kangarlu, Mohammad [1 ]
Galvani, Sadjad [1 ]
机构
[1] Urmia Univ, Fac Elect & Comp Engn, Orumiyeh 5756151818, Iran
关键词
Voltage; Inverters; Modulation; Harmonic analysis; Switches; Topology; Pulse width modulation; Adjustable dc-link voltage; multilevel inverter (MLI); nonequal dc sources; particle swarm optimization (PSO) algorithm; selective harmonic elimination pulsewidth modulation (PWM); total harmonic distortion (THD); SELECTIVE HARMONIC ELIMINATION; CONVERTERS; MINIMIZATION; STATCOM;
D O I
10.1109/TPEL.2022.3146825
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One of the problems of the selective harmonic elimination pulsewidth modulation (SHE-PWM) method is a limited range of feasible solutions. In many practical applications, the inverter is required to produce a variable output voltage within a wide range (e.g., 0.1 to 1). When the inverter operates in a low modulation index (low output voltage), the output harmonic distortion increases. This article introduces a method to use the SHE-PWM technique for a wide range of modulation indices, which allows achieving a high-quality output waveform in a cascaded H-bridge multilevel inverter. In a five-level case, a dc-dc converter regulates the dc-link voltage of only one bridge. In this way, the extra hardware requirement is reduced, and also a higher number of voltage levels is achieved, which improves the waveform quality. The particle swarm optimization algorithm is used to solve the SHE problem for different output voltage values. Two strategies are proposed to obtain the variable dc-link voltage; one of them is suitable for the lower output voltage values and the other one is more suitable for high values of the output voltage. The proposed strategies have been tested through simulation and experimental studies in different conditions. The results indicate a considerable improvement in the output waveform quality.
引用
收藏
页码:8065 / 8075
页数:11
相关论文
共 31 条
[21]  
Sadoughi M., 2021, P 2021 IEEE KANS POW, P1
[22]   Selective Harmonic Elimination PWM for Cascaded H-bridge Multilevel Inverter with Wide Output Voltage Range Using PSO Algorithm [J].
Sadoughi, Milad ;
Zakerian, Ali ;
Pourdadashnia, Amirhossein ;
Farhadi-Kangarlu, Mohammad .
2021 IEEE TEXAS POWER AND ENERGY CONFERENCE (TPEC), 2021, :30-35
[23]   Selective Harmonic Elimination Technique With Control of Capacitive DC-Link Voltages in an Asymmetric Cascaded H-Bridge Inverter for STATCOM Application [J].
Sajadi, Rahman ;
Iman-Eini, Hossein ;
Bakhshizadeh, Mohammad Kazem ;
Neyshabouri, Yousef ;
Farhangi, Shahrokh .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2018, 65 (11) :8788-8796
[24]   An Envelope Type (E-Type) Module: Asymmetric Multilevel Inverters With Reduced Components [J].
Samadaei, Emad ;
Gholamian, Sayyed Asghar ;
Sheikholeslami, Abdolreza ;
Adabi, Jafar .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2016, 63 (11) :7148-7156
[25]   Single-Phase Step-Up Switched-Capacitor-Based Multilevel Inverter Topology With SHEPWM [J].
Siddique, Marif Daula ;
Mekhilef, Saad ;
Padmanaban, Sanjeevikumar ;
Memon, Mudasir Ahmed ;
Kumar, Chandan .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2021, 57 (03) :3107-3119
[26]   Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count [J].
Siddique, Marif Daula ;
Mekhilef, Saad ;
Shah, Noraisyah Mohamed ;
Memon, Mudasir Ahmed .
IEEE ACCESS, 2019, 7 :24498-24510
[27]   Simultaneous Selective Harmonic Elimination and THD Minimization for a Single-Phase Multilevel Inverter With Staircase Modulation [J].
Srndovic, Milan ;
Zhetessov, Aidar ;
Alizadeh, Tohid ;
Familiant, Yakov L. ;
Grandi, Gabriele ;
Ruderman, Alex .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2018, 54 (02) :1532-1541
[28]   Harmonic Elimination of Cascade Multilevel Inverters with Nonequal DC Sources Using Particle Swarm Optimization [J].
Taghizadeh, H. ;
Hagh, M. Tarafdar .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (11) :3678-3684
[29]   A General Review of Multilevel Inverters Based on Main Submodules: Structural Point of View [J].
Vijeh, Mahdi ;
Rezanejad, Mohammad ;
Samadaei, Emad ;
Bertilsson, Kent .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2019, 34 (10) :9479-9502
[30]   Unified Selective Harmonic Elimination for Cascaded H-Bridge Asymmetric Multilevel Inverter [J].
Yang, Kehu ;
Lan, Xinfu ;
Zhang, Qi ;
Tang, Xin .
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2018, 6 (04) :2138-2146