Performance Analysis of III-V and IV Semiconductors Based Double Gate Hetero Material Negative Capacitance TFET

In this paper, a combination of ferroelectric (FE) HfZrO2 and dielectric (DE) SiO2 is used to generate negative capacitance (NC) effects in Hetero Material (HM) tunnel FETs (TFETs). We have investigated the performance of some III-V alloys and Group IV semiconductors along with the FE-DE gate stack. The electric field at the tunnel junction adequately improved due to potential intensification in the presence of NC that leads to reduced threshold voltage (V-th). Also, a suitable combination of low and high band gap III-V and IV semiconductors in the source and drain/channel regions improves ON current (I-ON) and subthreshold swing (SS) significantly as compared to the conventional TFET device. Here we present a comparison of DC/RF/linearity analysis among a wide variety of NC-HM-TFETs, which is not reported previously to the best of our knowledge. We found that Ge/GaAs based device provides better I-ON/I-OFF = 1.95 x 10,(13) V-th = 0.41, SS =12.2 mV/dec, g(m) = 47.7 mu S and f(t) = 4.89GHz after final device optimization, which concludes higher energy proficiency and superior performance in comparison to conventional TFET.