Efficient optimal design space characterization methodologies

被引:12
作者
Blythe, SA
Walker, RA
机构
[1] St Louis Univ, Parks Coll, Dept Comp Sci, St Louis, MO 63156 USA
[2] Kent State Univ, Dept Math & Comp Sci, Kent, OH 44242 USA
关键词
bounding; clock-length determination; design space exploration; efficient searching; high-level synthesis; module selection; scheduling;
D O I
10.1145/348019.348058
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
One of the primary advantages of a high-level synthesis system is its ability to explore the design space. This paper presents several methodologies for design space exploration that compute all optimal tradeoff points for the combined problem of scheduling, clock-length determination, and module selection. We discuss how each methodology takes advantage of the structure within the design space itself as well as the structure of, and interactions among, each of the three subproblems.
引用
收藏
页码:322 / 336
页数:15
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