A Battery-Powered Activity-Dependent Intracortical Microstimulation IC for Brain-Machine-Brain Interface

被引:128
作者
Azin, Meysam [1 ]
Guggenmos, David J. [2 ,3 ]
Barbay, Scott [2 ,3 ]
Nudo, Randolph J. [2 ,3 ]
Mohseni, Pedram [1 ,4 ]
机构
[1] Case Western Reserve Univ, Dept Elect Engn & Comp Sci, Cleveland, OH 44106 USA
[2] Univ Kansas, Med Ctr, Dept Mol & Integrat Physiol, Kansas City, KS 66160 USA
[3] Univ Kansas, Med Ctr, Landon Ctr Aging, Kansas City, KS 66160 USA
[4] Vet Affairs VA Res Ctr Excellence, Adv Platform Technol APT Ctr, Cleveland, OH USA
关键词
Activity-dependent microstimulation; brain-machine-brain interface; intracortical microstimulation; neural recording; neurostimulation; spike discrimination; system-on-chip; INSTRUMENTATION AMPLIFIER; STIMULATION; OPTIMIZATION; PROSTHESIS; COMPUTER; SYSTEM; CHIP;
D O I
10.1109/JSSC.2011.2108770
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes an activity-dependent intracortical microstimulation (ICMS) system-on-chip (SoC) that converts extracellular neural spikes recorded from one brain region to electrical stimuli delivered to another brain region in real time in vivo. The 10.9-mm(2) SoC incorporates two identical 4-channel modules, each comprising an analog recording front-end with total input noise voltage of 3.12 mu V-rms and noise efficiency factor (NEF) of 2.68, 5.9-mu W 10-bit successive approximation register analog-to-digital converters (SAR ADCs), 12.4-mu W digital spike discrimination processor, and a programmable constant-current microstimulating back-end that delivers up to 94.5 mu A with 6-bit resolution to stimulate the cortical tissue when triggered by neural activity. For autonomous operation, the SoC also integrates biasing and clock generation circuitry, frequency-shift-keyed (FSK) transmitter at 433 MHz, and dc-dc converter that generates a power supply of 5.05 V for the microstimulating back-end from a single 1.5-V battery. Measured results from electrical performance characterization and biological experiments with anesthetized rats are presented from a prototype chip fabricated in AMS 0.35 mu m two-poly four-metal (2P/4M) CMOS. A noise analysis for the selected low-noise amplifier (LNA) topology is presented that obtains a minimum NEF of 2.33 for a practical design given the technology parameters and power supply voltage. Future considerations in the SoC design with respect to silicon area and power consumption when increasing the number of channels are also discussed.
引用
收藏
页码:731 / 745
页数:15
相关论文
共 48 条
[1]   A new modeling and optimization of gain-boosted cascode amplifier for high-speed and low-voltage applications [J].
Ahmadi, MM .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2006, 53 (03) :169-173
[2]   A 5 μW/Channel Spectral Analysis IC for Chronic Bidirectional Brain-Machine Interfaces [J].
Avestruz, Al-Thaddeus ;
Santa, Wesley ;
Carlson, Dave ;
Jensen, Randy ;
Stanslaski, Scott ;
Helfenstine, Alan ;
Denison, Tim .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (12) :3006-3024
[3]   Comparisons of FIR and IIR implementations of a subtraction-based stimulus artifact rejection algorithm [J].
Azin, Meysam ;
Chiel, Hillel J. ;
Mohseni, Pedrarn .
2007 ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN MEDICINE AND BIOLOGY SOCIETY, VOLS 1-16, 2007, :1437-+
[4]   A high-output-impedance current microstimulator for anatomical rewiring of cortical circuitry [J].
Azin, Meysam ;
Mohseni, Pedram .
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, :2502-2505
[5]   An Activity-Dependent Brain Microstimulation SoC with Integrated 23nV/rtHz Neural Recording Front-End and 750nW Spike Discrimination Processor [J].
Azin, Meysam ;
Guggenmos, David J. ;
Barbay, Scott ;
Nudo, Randolph J. ;
Mohseni, Pedram .
2010 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2010, :223-+
[6]   A 94-μW 10-b Neural Recording Front-End for an Implantable Brain-Machine-Brain Interface Device [J].
Azin, Meysam ;
Mohseni, Pedram .
2008 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE - INTELLIGENT BIOMEDICAL SYSTEMS (BIOCAS), 2008, :221-224
[7]   A low-ripple voltage tripler [J].
Bedeschi, F. ;
Boffino, C. ;
Bonizzoni, E. ;
Khouri, O. ;
Pollaccia, G. ;
Resta, C. ;
Torelli, G. .
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, :2753-2756
[8]   Restoring lost cognitive function [J].
Berger, TW ;
Ahuja, A ;
Courellis, SH ;
Deadwyler, SA ;
Erinjippurath, G ;
Gerhardt, GA ;
Gholmieh, G ;
Granacki, JJ ;
Hampson, R ;
Hsaio, MC ;
Lacoss, J ;
Marmarelis, VZ ;
Nasiatka, P ;
Srinivasan, V ;
Song, D ;
Tanguay, AR ;
Wills, J .
IEEE ENGINEERING IN MEDICINE AND BIOLOGY MAGAZINE, 2005, 24 (05) :30-44
[9]   A SILICON-BASED, 3-DIMENSIONAL NEURAL INTERFACE - MANUFACTURING PROCESSES FOR AN INTRACORTICAL ELECTRODE ARRAY [J].
CAMPBELL, PK ;
JONES, KE ;
HUBER, RJ ;
HORCH, KW ;
NORMANN, RA .
IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, 1991, 38 (08) :758-768
[10]   A 128-Channel 6 mW Wireless Neural Recording IC With Spike Feature Extraction and UWB Transmitter [J].
Chae, Moo Sung ;
Yang, Zhi ;
Yuce, Mehmet R. ;
Hoang, Linh ;
Liu, Wentai .
IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING, 2009, 17 (04) :312-321