Reliability and Hardware Implementation of Rank Modulation Flash Memory

被引：0
|
作者：
Ma, Yanjun [1 ]
Kan, Edwin Chihchuan [2 ]
Li, Yue [3 ]
Bruck, Jehoshua [3 ]
机构：
[1] Intellectual Ventures, Invent Dev Fund, Bellevue, WA 98005 USA
[2] Cornell Univ, Dept Elect Engn, Ithaca, NY 14850 USA
[3] CALTECH, Dept Elect Engn, Pasadena, CA 91125 USA
来源：
2015 15TH NON-VOLATILE MEMORY TECHNOLOGY SYMPOSIUM (NVMTS) | 2015年
关键词：
flash memory; rank modulation; reliability; CODES;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We review a novel data representation scheme for NAND flash memory named rank modulation (Rill), and discuss its hardware implementation. We show that under the normal threshold voltage (V-th) variations, RM has intrinsic read reliability advantage over conventional multiple-level cells. Test results demonstrating superior reliability using commercial flash chips are reviewed and discussed. We then present a read method based on relative sensing time, which can obtain the rank of all cells in the group in one read cycle. The improvement in reliability and read speed enable similar program-and-verify time in RM as that of conventional MLC flash.
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页数：5
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