A Novel Approach for Doherty PA Design Using a Compact L-C Combiner

被引：3

作者：

Bachi, Joe ^{[1
,2
,3
]}

Serhan, Ayssar ^{[1
]}

Pham, Dang-Kien Germain ^{[4
]}

Parat, Damien ^{[1
]}

Reynier, Pascal ^{[1
]}

Desgreys, Patricia ^{[4
]}

Giry, Alexandre ^{[1
]}

机构：

[1] Univ Grenoble Alpes, CEA Leti, F-38054 Grenoble, France

[2] Inst Polytech Paris, Telecom Paris, LTCI, F-75013 Paris, France

[3] NXP Semicond, Radio Power Dept, F-31100 Toulouse, France

[4] Inst Polytech Paris, Telecom Paris, LTCI, F-91120 Palaiseau, France

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2022年 / 69卷 / 10期

关键词：

Power generation; Voltage; Power amplifiers; Transistors; Power combiners; Voltage measurement; Trajectory; 5G; class-E; Doherty; power amplifier; power combiner; SOI; POWER-AMPLIFIERS;

D O I：

10.1109/TCSII.2022.3185174

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this brief, a new combiner analysis method for the design of Doherty Power Amplifiers (DPA) is proposed. A compact L-C combiner is used to validate the proposed method through both simulation and realization of a two-stage DPA in a 130nm RF-SOI process. Using a 2.3GHz CW signal, the PA achieves a measured peak PAE of 51% at 32dBm output power under 3.4V supply voltage. From 2.1GHz to 2.5GHz, the PA shows an average output power and PAE higher than 26.9dBm and 39% respectively at -35dBc E-UTRA ACLR when using a 10MHz-50RB QPSK LTE uplink signal with memoryless DPD. At 2.3GHz, the PA achieves a linear Pout and PAE of 28.85dBm and 42.8% respectively.

引用

页码：4023 / 4027

页数：5

共 12 条

[1] Analytical design equations for Class-E power amplifiers with finite dc-feed inductance and switch on-resistance [J].