A 3.1∼10.6 GHz CMOS direct-conversion receiver for UWB applications

被引：0
|
作者：
Wu, Chung-Yu [1 ]
Lo, Yi-Kai [1 ]
Chen, Min-Chiao [1 ]
机构：
[1] Natl Chiao Tung Univ, Inst Elect, Nanoelect & Giga Scale Syst Lab, Hsinchu, Taiwan
来源：
2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3 | 2006年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a 3.1 similar to 10.6 GHz fully integrated low-power CMOS direct-conversion receiver for ultra-wideband (UWB) applications is proposed and analyzed. The proposed receiver consists of a wideband low-noise amplifier (WLNA), quadrature down-conversion mixers, output I/Q buffers and a carrier generator. This chip was designed in 0.13-um CMOS technology. According to the simulation results, the proposed receiver has noise figure (NF) of 4.1 similar to 7.1 dB, receiver voltage gain of 22 dB, and input-referred 1-dB compression point (P-1dB) of -22 similar to-26 dBm and third-order intercept point (IIP3) of -12 similar to-16 dBm. It consumes 38.4 mW from 1.2 V power supply.
引用
收藏
页码：1328 / 1331
页数：4
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