Reliability screening of high-k dielectrics based on voltage ramp stress

被引：75

作者：

Kerber, A.

Pantisano, L.

Veloso, A.

Groeseneken, G.

Kerber, M.

机构：

[1] Qimonda AG, D-81739 Munich, Germany

[2] IMEC, D-81739 Munich, Germany

[3] Katholieke Univ Leuven, ESAT, D-81739 Munich, Germany

[4] Infineon Technologies AG, D-81739 Munich, Germany

来源：

MICROELECTRONICS RELIABILITY | 2007年 / 47卷 / 4-5期

关键词：

D O I：

10.1016/j.microrel.2007.01.030

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

High-k development moves towards integration into CMOS processes rising attention for the reliability assessment. In this paper, the methodology for reliability screening is discussed based on constant voltage stress and voltage ramp stress. It will be shown that both procedures yield equivalent results and the determined reliability parameters are compatible. Better control of the overall measurement time favours the voltage ramp stress as preferred fast screening method for integration of high-k dielectrics. (C) 2007 Published by Elsevier Ltd.

引用

页码：513 / 517

页数：5

共 8 条

[1] Dependence on gate work function of oxide charging, defect generation, and hole currents in metal-oxide-semiconductor structures [J].